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Title Integration of System-On-Chip Simulation Models
Author Storgaard, Michael
Supervisor Madsen, Jan (Department of Informatics and Mathematical Modeling, Technical University of Denmark, DTU, DK-2800 Kgs. Lyngby, Denmark)
Virk, Kashif Munir (Department of Informatics and Mathematical Modeling, Technical University of Denmark, DTU, DK-2800 Kgs. Lyngby, Denmark)
Institution Technical University of Denmark, DTU, DK-2800 Kgs. Lyngby, Denmark
Thesis level Master's thesis
Year 2005
Abstract Reaching deep sub-micron technology within the near future makes it possible to implement complex embedded Multiprocessor System-on-Chip (MPSoC) as a single chip solution. Combined with the requirements for short time to market and low production cost, make designs rely on IP core re-usability. To cope with the increasing complexity of the software and hardware design space, the SoC designer rely on simulation tools to be able to make crucial design decisions at an early stage in the design phase; especially related to the SoC communication platform. For efficient and powerful design space exploration, the ultimate simulation tool consists of a library from where the SoC designer can freely select from a variety of different SoC models, representing IP cores at different abstraction level and then be able to integrate these into a common SoC communication platform (e.g. NoC) having the same interface to the different models. Thus constructing a simulation framework for a particular design space can be fully customized, relative to representing the abstraction level of the different IP cores as desired. This project work contributes to reaching this goal by proposing a methodology for extending a SystemC based high-level RTOS model for MPSoC[7] to support inter-processor communication using OCP2.0 at TL1 and TL0. Also presented is a methodology for configure a simulation framework in a fast and easy manner, based on a configuration file. Further, a new SoC communication platform model is proposed, allowing abstract modeling of different topologies, such as bus and mesh, while still being able to support communication of real data; also at cycle true level. Finally, different design space exploration experiments are presented with the aim of showing the capabilities of the new models.
Imprint Department of Informatics and Mathematical Modeling, Technical University of Denmark, DTU : DK-2800 Kgs. Lyngby, Denmark
Pages 172
Fulltext
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Admin Creation date: 2006-06-22    Update date: 2012-12-19    Source: dtu    ID: 185875    Original MXD